Row Address Width
Sets the number of row address bits. The Row Address Width determines which Component Density values are available. Larger row address widths support higher-density devices.
- LPDDR5 SDRAM
- Valid values: 13, 14, 15, 16, 17. Default: 15.
- DDR5 SDRAM
- Valid values: 16, 17, 18. Default: 16.
Bank Address Width
Sets the number of bank address bits.
- LPDDR5 SDRAM
- 2 (fixed).
- DDR5 SDRAM
- 2 (fixed for all component widths).
Bank Group Width
Sets the number of bank group address bits. The supported values depend on the Controller Type and Base Component Width.
- LPDDR5 SDRAM
- 2 (fixed).
- DDR5 SDRAM (x4/x8)
- 3 (fixed, 8 bank groups).
- DDR5 SDRAM (x16)
- 2 (fixed, 4 bank groups).
Component Density
Selects the capacity of each individual DRAM component. The available density options depend on the memory device type and the selected Row Address Width.
- Valid values
- 2Gb, 3Gb, 4Gb, 6Gb, 8Gb, 12Gb, 16Gb, 24Gb, 32Gb, 64Gb
Memory Density per Channel
Displays the computed total memory capacity per channel or per DIMM.