DDR5 RDIMM (Registered DIMM), CUDIMM (Clocked Unbuffered DIMM), and CSODIMM (Clocked Small Outline DIMM) memory interfaces require a mandatory I2C sideband connection between the Versal adaptive SoC and the DIMM for PMIC (power management IC ) initialization, RCD (Register Clock Driver) configuration, and clock buffer programming. This section defines the I2C connectivity requirements, addressing, memory wizard configuration, and debug guidance specific to these DIMM types.