When you select any RDIMM configuration or a UDIMM/SODIMM interface operating at 6400Mbps, you must enable the appropriate I3C/I2C interface in the Processing System (PS) Wizard IP. To support higher data rates clock buffer initialization is required for unbuffered DIMMs at 6400Mbps. The DDRMC5 GUI still only allows the selection of UDIMM or SODIMM interfaces, but these are synonymous with CUDIMM or CSODIMM when operating at the 6400Mbps data rate. The specific configuration depends on the device and the PS version implemented. For example, some devices require enabling PMC_I2C, while others may show PMC_I3C_I2C in the PS Wizard. Ensure that the correct peripheral is enabled as indicated in the wizard interface. If the device displays PMC_I2C, enable it as shown in the example configuration screen. Similarly, if PMC_I3C_I2C is listed, select that option. See the following figures for reference.
Figure 1. PMC_I2C
Figure 2. PMC_I3C_I2C