Configuring Inline ECC and Encryption Using the Advanced Configuration Editor - Configuring Inline ECC and Encryption Using the Advanced Configuration Editor - 1.0 English - PG456

Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456)

Document_ID
PG456
Release_Date
2026-08-07
Version
1.0 English

Enabling inline ECC (ILECC) or inline encryption (Crypto) in a Versal Gen 2 design requires two separate configuration steps:

  1. An initial Vivado step to select the feature in the IP GUI and generate the XSA.
  2. A post-implementation step in the ACE.
Important: PDIs generated by Vivado alone are incomplete when ILECC or Crypto is enabled. The design will not operate correctly until the ACE overlay CDO is merged into the PDI using bootgen. Always use the bootgen-generated final PDIs for hardware bring-up.