Not all memory controllers are fully bonded out, and the supported DDRMC5 configurations vary depending on the number of X5IO banks and pins available. The availability of banks depends on the device, package, and memory controller location.
Not all memory controllers are fully bonded out, and the supported DDRMC5 configurations vary depending on the number of X5IO banks and pins available. The availability of banks depends on the device, package, and memory controller location.