After setting the memory topology in the General tab, navigate to the DDRMC5 Configuration tab to access the detailed DDRMC5 settings.
Click Configure DDRMC5 to launch the embedded Configure DDRMC5 dialog box. This provides detailed memory controller parameter settings organized across four sub-tabs. Refer to DDRMC5 Configuration Dialog Box.
Inline ECC
Select Inline ECC to enable inline ECC error detection and correction on the DDR data bus.
When enabled, you must set the ECC configuration using the Advanced Configuration Editor (ACE). A note in the dialog directs you to the ACE for Inline ECC and DDR Encryption configuration.
Crypto
Selects the DDR encryption algorithm applied to data in flight between the DDRMC5 and external memory.
- None
- No encryption.
- XTS
- XEX-based tweaked codebook mode with ciphertext stealing.
- GCM
- Galois/Counter Mode.
- XTS_GCM
- Both XTS and GCM encryption modes enabled.