The I/O Planning view
includes the I/O Ports and Package Pins tabs. AMD
recommends I/O planning high-speed interfaces in the following order to achieve the
maximum utilization of available X5IO logic resources:
- Integrated DDRMC through NoC
- Soft memory controllers
- X5IO Wizard
- I/O logic
This tool allows only for Octad- and bank-level granularity. If you require more granularity, use the classic pin planning tools. If the X5IO Wizard IP is present in the design, banners on both tabs provide a message and a button to launch the Advanced I/O Planner. The Advanced I/O Planner recognizes all interfaces in the X5IO I/O block. If a hard or soft memory controller is present, it also appears in the Advanced I/O Planner. The interface placement is optimized using a centralized hardware rule-based engine. Placement priority is assigned by interface type, with hard memory controllers prioritized over soft memory controllers..
- To invoke the pin planner, open the synthesized Design, and
select Open Advanced I/O Planner in the
I/O Ports tab:
- In the example design, each of the 30 pin interfaces can be
placed with a single bank. This example uses Bank 706 and 705. Selecting the
Auto Assign automatically place all cores. To restart pin placement, use the
Unplace Ports for
Instances button.
- To select specific Octads, use the Nibble Groups tab. In the
Signal Groups column, click the selection button on the right. Selecting a given
Octad group moves the Octad to a given location.
Note: If you use example designs generated
directly from the IP, the XDC file in the example design provides default I/O
assignments that appear in the Advanced I/O Planner.
The pin planner provides:
- Collapsible Device Resource Tree
- Device resources, such as banks, Octad groups, display in a collapsible tree that varies depending on the selected device.
- DRC Information
- At the top of the Advanced I/O Planner, a DRC status message provide information about the DRC violations with a link to more information, errors, and warnings.