Error Signaling - Error Signaling - 1.0 English - PG453

AXI Switch v1.0 LogiCORE IP Product Guide (PG453)
Document ID
PG453
Release Date
2025-11-20
Version
1.0 English

The error conditions detected in the AXI Switch are as follows:

Table 1. Error Signaling
Error Condition Description Response Action
Address decode error No eligible MI mapped to the address of the transaction, according to the base/high address parameters AXI Switch generates a protocol-compliant DECERR response to the connected master, and does not propagate the transaction to any MI.

These errors are typical of runtime conditions, such as a software flaw, and do not indicate any flaw in the hardware system design.
Read/write access violation A read or write transaction targets an address segment that is disabled for read or write
TrustZone violation An address segment with the SECURE parameter enabled is targeted by a transaction in which awprot[1] or arprot[1] is set (unsecure)
Unsupported FIXED burst A transaction is received in which the burst type (arburst or awburst) is FIXED (0b00) The pc_asserted sideband output port is asserted, and the pc_status sideband output indicates which SI observed the error and whether it was for read vs. write.

During simulation, an assertion error is issued for the first such read or write error occurring on each SI.

If NUM_MI>1 or if STRATEGY=BALANCED or PERFORMANCE, the address decode logic traps the error and issues a DECERR response, and does not propagate the transaction to any MI.

If NUM_MI=1 and STRATEGY=AREA, there is no address checking logic implemented and the transaction is propagated to the MI indicating a maximum-sized INCR burst (or sequence of singles), but with no data-path processing for the unsupported burst type, likely resulting in data corruption.

These errors are indicative of a hardware system design flaw, such as parameter settings that are not compatible to connected devices, and should be resolved during system debug.
Unsupported WRAP burst A transaction is received in which the burst type (arburst or awburst) is WRAP (0b10) on a SI configured with SUPPORTS_WRAP disabled
Unsupported Narrow burst A narrow burst transaction (arlen>0 or awlen>0, in which the arsize/awsize signal indicates a stride smaller than the physical data-width of the SI) on a SI is configured with SUPPORTS_NARROW disabled

The AXI Switch does not detect the following error conditions:

  • AXI4 protocol violations caused by connected endpoints. The AXI Protocol Checker IP should be deployed to debug such conditions. For more information, refer to the AXI Protocol Checker LogiCORE IP Product Guide (PG101).
  • Timeout of any AXI handshake if the connected master/slave device stalls for any amount of time.
  • Write data interleaving from an AXI3 master configured with a write reordering depth greater than one. All Write data is routed in the same order as AW commands, W-channel wid inputs are ignored by AXI Switch.