FIXED Bursts
For each AXI4 or AXI3 SI, the following burst conversion logic is implemented, depending on the SUPPORTS_WRAP and SUPPORTS_NARROW user parameters. For AXI4-Lite SI, no burst transactions are possible, so no burst conversion logic is implemented.
The AXI Switch IP does not support FIXED type bursts (arburst or awburst = 0).
If the IP receives a FIXED burst on any SI, an error is signaled on the pc_asserted and pc_status sideband output ports, accompanied by a simulation assertion
error.
WRAP Bursts
The AXI Switch IP converts all WRAP type bursts (arburst or awburst = 2)
received on the SI into either INCR bursts (arburst
or awburst = 1) or into a sequence of singles
(arlen or awlen = 0) accessing equivalent address locations on the MI. WRAP
conversion logic is only implemented on a SI where SUPPORTS_WRAP is enabled.
Otherwise, if a WRAP burst is received on any SI where SUPPORTS_WRAP is disabled, an error is signaled on the
pc_asserted and pc_status sideband output ports, along with a simulation assertion
error. A WRAP burst cannot be produced on any MI of the AXI Switch IP. Therefore,
any AXI Switch SI connected downstream of another AXI Switch instance can safely
disable SUPPORTS_WRAP.
Narrow Bursts
The AXI Switch IP converts all "narrow bursts" received on the SI
into either fully-packed INCR bursts or a sequence of singles accessing equivalent
address locations on the MI. A "narrow burst" is defined as a multi-beat burst
(arlen or awlen > 0) where the arsize or
awsize is a value less than the maximum size
for the physical width of the SI.
After conversion, the arsize or awsize
appearing on the MI correspond to the full data-width of the MI. However, a
single-beat transaction (arlen or awlen = 0) is never considered as a "narrow burst", and
any in-bound arsize or awsize value that is less than both the SI width and the MI width are
propagated to the MI to preserve the precise address footprint of the original
transaction.
Narrow burst conversion logic is implemented only on the SI where
SUPPORTS_NARROW is enabled. Otherwise, if a
narrow burst is received on any other SI where SUPPORTS_NARROW is disabled, an error
is signaled on the pc_asserted and pc_status sideband output ports along with a simulation
assertion error. A narrow burst cannot be produced on any MI of the AXI Switch IP.
Therefore, any AXI Switch SI connected downstream of another AXI Switch instance can
safely disable SUPPORTS_NARROW.
Low-area Mode
When STRATEGY=AREA, the IP is put into low-area burst-to-singles mode. Area is reduced by splitting all bursts (including INCR bursts, WRAP bursts, and narrow bursts) to produce a series of single-beat transactions on the MI that span the originally targeted address footprint.
The various burst conversions performed by AXI Switch are summarized in the following table.
| In-bound Transaction | Strategy | |||
|---|---|---|---|---|
| Performance | Balanced | Area | ||
| Single (len=0) | Single 1 |
|
||
| Fully-packed INCR burst | INCR burst (split only to avoid len>255 when downsizing) | |||
| Narrow burst (len>0) | Convert to fully-packed burst (split only to avoid len>255 when downsizing) | Split write bursts into singles at original size. Split read bursts into singles at full SI data-width size. Bandwidth reduction can result while processing narrow burst transactions. 1 | ||
| WRAP burst | Convert to one INCR burst starting at wrap address boundary | Split into singles starting at target address. Bandwidth reduction can result while processing WRAP burst transactions. 1 | Split as described above starting at target address | |
| FIXED burst | Not supported | |||
|
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