This page of parameters is visible in the GUI only when NUM_MI>1.
Mnn* parameters are hidden in the GUI for nn >= NUM MI.
For each MI, *SEGss* parameters are hidden in the GUI for ss >= Mnn_SEGMENTS.
| User Parameter (00<=nn <=15) (00<=ss<=15) |
Format | Range | Default | Model Parameter | Model Param Format | Customization GUI Label, Description |
|---|---|---|---|---|---|---|
| Mnn_SEGMENTS | Integer | 1-16 | 1 | C_NUM_SEG, C_SEG_MI | 1<=integer <=64, bitstring {C_NUM_ SEG {int32}} | Number of Mnn Segments Increasing Mnn_SEGMENTS makes more address range rows appear for the Mnn interface, allowing additional address segments to be defined for targeting the same MI. From the set of Mnn_SEGMENTS user parameters, the value of model-parameter C_NUM_SEG is derived as the total number of power-of-2 apertures needed to represent all segments across all MI, and is limited to a maximum of 64. The vectored value of the model-parameter C_SEG_MI is derived as the set of MI indices associated with all segments. The Mnn_SEGMENTS user-parameter is also used to map the Mnn_SEGss prefix in the BASE_ADDR and HIGH_ADDR user-parameters to corresponding fields in the vectored C_SEG_BASE_ADDR and C_SEG_RANGE model-parameters. GUI Validation error if the total number of required power-of-2 segments (C_NUM_SEG) > 64. |
Mnn_SEGss_BASE_ADDR |
Bitstring (64-bit) | For Mnn_ SEGss: nn * 0x10000 | C_SEG_BAS E_ADDR | bitstring {C_NUM_ SEG {bit64}} | Base Address Must be at least 4-byte aligned (low-order 2-bit must be zero. Validation error if any pair of address ranges overlap (if Mnn_SEGss_BASE_ADDR ≤ Mmm_SEGrr_BASE_ADDR ≤ Mnn_SEGss_HIGH_ADDR, for any valid combination of nn, mm, ss, and rr, provided HIGH_ADDR≠0). 1 |
|
| Mnn_SEGss_HIGH_ADDR | Bitstring (64-bit) | For Mnn_ SEG00: nn * 0x10000
+ 0xFFFF For Mnn_ SEGss: 0, where ss>0 |
C_SEG_RANGE | bitstring {C_NUM_ SEG {int32}}, where 0×0≤int32≤0x40 | High Address The resulting address range must be at least 4-byte aligned (low-order 2-bit must be ones). If 0, SEGss is regarded as a null (ignored) address segment. Validation soft-warning if the resulting aperture is less than 4k bytes: The target MI is determined by matching AxADDR to the Mnn_SEGss_BASE_ADDR/Mnn_SEGss_HIGH_ADDR pairs. The entire burst, including any split transaction fragments, then gets propagated to the target MI even if it runs beyond the location specified by Mnn_SEGss_HIGH_ADDR or crosses into another address segment. Each field of the vectored model parameter C_SEG_RANGE is set to the binary size of each aperture, typically derived by log2(Mnn_SEGss_HIGH_ADDR -Mnn_SEGss_BASE_ADDR + 1). 1 If the range specified by BASE_ADDR/HIGH_ADDR is not a power-of-2, it is internally decomposed into a series of adjacent power-of-2 apertures that target the same MI when a transaction address matches any of the apertures. |
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| Mnn_SEGss_SU PPORTS_ {READ,WRITE} | Boolean | false, true | true | C_SEG_SUP PORTS_ {READ, WRITE} | bitstring {C_NUM_ SEG {int32}} (int32 = 0, 1) | Access Read/Write Address segment Read/Write accessibility. When disabled for read/write, any in-bound transactions targeting the associated address segment requesting a prohibited read/write access results in a DECERR response. |
| Mnn_SEGss_SE CURE_{READ, WRITE} | Boolean | false, true | false | C_SEG_SEC URE_{READ, WRITE} | bitstring {C_NUM_ SEG {int32}} (int32 = 0, 1) | Secure Read/Write Enforce TrustZone security to access each address segment. When enabled for read/write, any inbound transactions targeting the associated address segment with the SECURE bit in the AR/AWPROT signal in the non-secure (high) state results in a DECERR response and no transaction propagated to any MI. |
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