AXI4-to-AXI3 Conversion - AXI4-to-AXI3 Conversion - 1.0 English - PG453

AXI Switch v1.0 LogiCORE IP Product Guide (PG453)

Document ID
PG453
Release Date
2025-11-20
Version
1.0 English

When an AXI4 SI issues a write transaction to an AXI3 MI, the AXI Switch produces the required WID output on the MI based on the AWID received at the SI. If a burst longer than 16 data beats is received, the command is split into several shorter burst transactions.

Transaction splitting due to AXI3 conversion is similar to the splitting that might result from downsizing. User-defined signals received on the AW and AR channels are replicated onto all resulting MI-side transactions. Conversely, when multiple B-channel transfers received on the MI are consolidated as a result of a split write transaction, only the user signal received on the last of the consolidated B transfers is propagated to the SI; user information received on earlier B transfers is discarded.