TX Error Packet Count Register (0x4) - 1.0 English - PG451

Ethernet Offload Engine LogiCORE IP Product Guide (PG451)

Document ID
PG451
Release Date
2025-05-29
Version
1.0 English

This is an overflow counter. When error packets are received from MCDMA whose lengths mismatch with the lengths mentioned on the control interface, this counter is incremented.

Table 1. TX Error Packet Count Register (0x4)
Bits Name Default Value Access Description
31:0 tx_error_pkt_count 0 R Overflow counter

Reset to AXI4-Stream resets this register to 0