The AMD LogiCORE™ IP Ethernet Offload Engine is a soft AMD IP core for use with the AMD Vivado™ Design Suite. The Ethernet Offload IP significantly accelerates the packet processing within the embedded processing systems with Ethernet by performing certain offload techniques within the PL of the SoC. Burdens upon the system processor and memory bandwidth needed to perform tasks, such as checksum calculation, checksum validation, GSO, GRO, and zero padding of frame data, can be mitigated with dedicated logic enabled with the Ethernet Offload Engine (EOE) IP.
The functional block diagram of the core is shown in the following figure.
Figure 1.
Core Block
Diagram
