Channel Port Register (Channel Offset + 0x10) - 1.0 English - PG451

Ethernet Offload Engine LogiCORE IP Product Guide (PG451)
Document ID
PG451
Release Date
2025-05-29
Version
1.0 English
Table 1. Channel Port Register (Channel Offset + 0x10)
Bits Name Default Value Access Description
31:16 dest_port_ch 0 R/W Destination port of GRO packets for channel
15:0 source_port_ch 0 R/W Source port of GRO packets for channel