| Port Name | I/O | Clock | Description |
|---|---|---|---|
| lvds_rx_clk | I | LVDS RX clock. | |
| lvds_rx_data | I | lvds_rx_clk | LVDS RX data. |
| lvds_tx_clk | O | LVDS TX clock. | |
| lvds_tx_data | O | lvds_tx_clk | LVDS TX data. This data signal is internally generated at the clock edge of a clock that is 90 degrees shifted to ltpi_tx_clk, but ltpi_tx_clk should be used to sample ltpi_tx_data at the far end. |