IP Connection Automation - IP Connection Automation - 3.0 English - PG447

This section takes a Versal AI Edge Series Gen 2 Embedded Common Platform Template as a reference design.

1. Once the design is generated, add VCU2 to block diagram
2. Right click on IP and run Connection Automation
   1. Select C0_S_AXI_NOC and select pz_wizard_0/FPD_AXI_NOC0.
   2. Select Multiple Masters in the Master NOC for VCU2 access for multiple masters. For example, in the following figure M08_INI is connected to C0_S_AXI_NOC with Multiple masters. FPD_AXI_NOC and LPD_AXI_NOC must be connected for Successful Configuration
      Figure 1. Example Design for Connections
   3. Select dpll_ref_clk and select New Clocking Wizard of 133.33 MHz.
   4. Select Clocking Wizard Inputs.
   5. Select S_AXI_LITE and select pz_wizard_0/FPD_AXI_PL.
3. Select OK.

Users need to connect remaining connections based on their system requirement. Refer Figure 1.