A custom rate control algorithm is supported that is run by the firmware on the RISC-V processor. For this purpose vcu2-ctrl-sw/app_riscv is available:
vcu2-ctrl-sw/app_riscv/
├── base.mk
├── constants.lds
├── constants.mk
├── MakefilePlugin
├── plugin
│ ├── plugin.mk
│ └── plugin_src.mk
├── plugin_c906_gcc.lds
├── plugin_common.lds
├── README_PLUGIN
└── riscv_config.mk
The custom rate control code is linked against the existing firmware binary (as sources are not made available). The following steps generates an encoder firmware binary with custom rate control:
- Clone repository: Xilinx/vcu2-ctrl-sw
- Create Firmware/ folder at the same level
- Copy encoder_firmware.bin from Xilinx/vcu2-firmware to Firmware/ folder
- cd vcu2-ctrl-sw/app_riscv
- Add RISC-V gcc compiler to $PATH. For example: export PATH=/<install>/gnu/riscv/lin/riscv64-unknown-elf/bin:$PATH
- make -f MakefilePlugin, or V=1 make -f MakefilePlugin for verbose (make -f MakefilePlugin clean to clean)
- bin/riscv/plugged_encoder_firmware.bin is generated that can replace /lib/firmware/ale2xx.fw on the platform
These steps compile vcu2-ctrl-sw/lib_rate_ctrl/ExampleRCPlugin.c which has logs that output to the kernel message buffer:
pCtx->pMcu->trace("setrcparam", 20);
Use the dmesg command on the platform to inspect the kernel message buffer.
In the encoder cfg file change the rate control mode:
[RATE_CONTROL]
RateCtrlMode = PLUGIN:
File vcu2-ctrl-sw/include/lib_rate_ctrl/PluginInterface.h describes the interface to implement.