The AMD LogiCORE™ IP H.264/H.265/JPEG Video Codec Unit 2 (VCU2) core supports multi-standard video encoding and decoding, including support for the High-Efficiency Video Coding (HEVC) H.265, Advanced Video Coding (AVC) H.264 standards and Joint Photographic Expert Group (JPEG) picture decoding. The VCU2 IP contains both encode (compress) and decode (decompress) functions and is capable of simultaneous encode and decode.
The VCU2 core operation depends on built-in RISC-V MCUs to service interrupts to coordinate data transfer. Each encoder and decoder are controlled by an MCU instance and it uses a task list prepared in advance such that the response times are not in the execution critical path. Almost all control software is offloaded to an MCU.