Quad Interface Mapping Tab - Quad Interface Mapping Tab - 1.0 English - PG442

Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442)

Document ID
PG442
Release Date
2024-11-13
Version
1.0 English

This page provides customization options to assign the lanes of each quad to various interfaces defined in the wrapper configuration tab. The GUI layout expands based on the number of Quads selected in the wrapper configuration tab. The customization options to map quads to each interface are provided. The following are customization GUI options provided for each Quad:

Figure 1. Quad Interface Mapping Tab
Number of targeted Interfaces
Enter the number of interfaces to be mapped to the current Quad. The table expands based on the number of targeted interfaces entry. Customization layout provides options to map the lanes of current quad to the targeted interfaces. The direction of each interface is auto populated based on the information provided in the wrapper configuration. The lanes for each interface need to be provided as customization input.
TX Master Clock source
Select desired master clock source options given in the dropdown menu.
Interface to lane Mapping
Read-only GUI option guides the user on mapping multiple interfaces to the single quad. The customization GUI checks to evaluate if the selected interfaces can be packed in the quad selected based on the physical resources. If the checks fail, the error message is provided to guide the users to provide the correct customization options.
Interface to Quad Mapping
Read-only GUI option provides guidance to the user if the information provided in the Quad Interface Mapping tab is correct.