The following are the key features of the wizard:
- Simple and intuitive feature selection flow.
- Onetime GUI entry for multiple line rate options to enable seamless dynamic rate switching without re-programming GT registers.
- Design entry through the IP catalog and IP integrator is supported for both AMD IP and custom IP.
- Synthesizable example design with configurable pseudo-random binary sequence (PRBS) data generator, checker, and link status indicator logic to quickly demonstrate core and transceiver functionality in simulation.