Features - Features - 1.0 English - PG442

Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442)

Document_ID
PG442
Release_Date
2026-07-30
Version
1.0 English

The wizard includes the following key features:

  • Simple and intuitive feature selection flow.
  • One-time GUI entry for multiple line rate options to enable seamless dynamic rate switching without reprogramming GT registers.
  • Design entry support through the IP catalog and IP integrator for both AMD IP and custom IP.
  • Synthesizable example design with configurable pseudo-random binary sequence (PRBS) data generator, checker, and link status indicator logic to quickly demonstrate core and transceiver functionality in simulation.