Designing with the Example Design - Designing with the Example Design - 1.0 English - PG442

Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442)

Document ID
PG442
Release Date
2024-11-13
Version
1.0 English

An example design can be generated for any instance of the Wizard IP core. The example design instantiates the core instance, any helper blocks that you have chosen to locate in the example design, and the requisite reference clock buffers. The contents of the example design are customized to support the specific core customization. Use of the example design as a demonstration and as a starting point for integration into your system is suggested.