Introduction - Introduction - 1.0 English - PG441

MIPI DSI-2 Receiver Subsystem LogiCORE IP Product Guide (PG441)

Document_ID
PG441
Release_Date
2026-07-27
Version
1.0 English

The Mobile Industry Processor Interface (MIPI) Display Serial Interface (DSI-2) RX subsystem implements a DSI-2 receive interface according to the MIPI DSI-2 standard v2.0 with underlying MIPI D-PHY standard v2.0. The subsystem receives data on MIPI D-PHY (compliant to MIPI Alliance Standard for D-PHY Specification, version 2.0) lanes and outputs pixel stream on an AXI4-Stream video interface. The subsystem allows fast selection of the top-level parameters and automates most of the lower-level parameterization. The AXI4-Stream video interface allows a seamless interface to other AXI4-Stream-based subsystems.