Simulating the Example Design - Simulating the Example Design - 1.0 English

Simulating the Example Design - Simulating the Example Design - 1.0 English - PG436

MIPI TX C-PHY/D-PHY LogiCORE IP Product Guide (PG436)

Document ID

PG436

Release Date

2026-06-23

Version

1.0 English

For more information about simulation, refer to the Vivado Design Suite User Guide: Logic Simulation (UG900).

Use the following steps to perform the Example Design Simulation:

Select MIPI TX PHY IP from the IP catalog.
Select the required Exdes Configuration in Example Design Simulation Tab of Customize IP window.
Generate the IP.
Right-click the MIPI TX PHY IP in the AMD Vivado™ IDE, and select Open Example Design.
After the design opens, select Flow > Run Simulation > Run Behavioral Simulation to launch the simulation.
To check test result, run the complete simulation by using run -all in the Tcl console.
- If the test passes, the following message displays:
```
INFO: Test Completed Successfully 
```
- If the test fails, the following message is displays:
```
ERROR: Test Failed
```
- If the test hangs, the following message is displays:
```
ERROR: Test Failed!! Test Timed out
```
Note: The test can hang when there is no data reception by MIPI RX PHY. For example, the test hangs because of the removal of the TX/RX PHY loopback connection.