Overview - Overview - 1.0 English - PG436

MIPI TX C-PHY/D-PHY LogiCORE IP Product Guide (PG436)

Document ID
PG436
Release Date
2026-06-23
Version
1.0 English

The following figure shows the top module that instantiates all components of the core and example design needed for the design and includes the following modules:

  • MIPI TX PHY
  • MIPI RX PHY
  • MIPI C-PHY/D-PHY Frame Generator
  • MIPI C-PHY/D-PHY Frame Checker

You can generate the example design for the following two MIPI TX PHY and MIPI RX PHY configurations with Questa Simulator:

  • C-PHY mode, 4 Lanes, 2250 Line rate, Shared Logic in core and PRBS data type.
  • D-PHY mode, 4 Lanes, 2250 Line rate, Shared Logic in core and PRBS data type.

You can use the example design to perform a quick simulation of MIPI TX/RX PHYs and to understand the interface behavior.

Figure 1. Core Example Design

Note: You can only generate the example design for the above-mentioned configurations only. The base IP GUI configuration is not considered to configure the MIPI TX PHY used in the example design.