This section describes the steps required to turn a MIPI TX PHY core in D-PHY mode into a fully functioning design with user-application logic.
Important: Not all implementations require all of the
design steps listed here. Follow the logic design guidelines in this manual
carefully.
When there are multiple instances of MIPI interfaces or other IPs sharing the same I/O bank, initialize all interfaces in the same HP IO bank at the same time. This includes resetting all instances at the same time.