The following figure shows the sharable resource connections from the MIPI TX C-PHY/D-PHY core with shared logic included (mipi_cphy_primary) to the instance of another MIPI TX C-PHY/D-PHY core without shared logic (mipi_cphy_secondary). Both cores are configured with C-PHY mode.
Figure 1. Shared Logic Example of MIPI TX C-PHY/D-PHY
Core for C-PHY
