The following figure shows the sharable resource connections from the
MIPI TX C-PHY/D-PHY core with shared logic included (mipi_dphy_primary) to the instance of another MIPI TX C-PHY/D-PHY core without shared logic (mipi_dphy_secondary). Both cores are configured with
D-PHY mode.
Figure 1. Shared Logic Example of MIPI TX C-PHY/D-PHY
Core for D-PHY
