Version Control Register (0x00) - Version Control Register (0x00) - 2.0 English - PG432

Versal AI Edge Series Gen 2 Image Signal Processor (ISP) Product Guide (PG432)

Document ID
PG432
Release Date
2025-11-20
Version
2.0 English

The version control register indicates the version of the Versal ISP Subsystem.

Table 1. Version Control Register (0x00)
Bits Name Reset Value Access Description
31:12 Reserved 0x0 R Reserved
11:8 Major version 0x2 R Indicates major version of the core
7:0 Minor version 0x0 R Indicates minor version of the core