Resources Tab - Resources Tab - 2.0 English - PG432

Versal AI Edge Series Gen 2 Image Signal Processor (ISP) Product Guide (PG432)

Document ID
PG432
Release Date
2025-11-20
Version
2.0 English

This tab is used for RPU to ISP0/1 mapping configuration, and if required, the instantiation of GPIO/IIC in the PL fabric when the ISP<0/1> IO Type is LIMO/LILO.

Figure 1. Resources Tab
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ISP<0/1>
RPU
Select RPU6, RPU7, RPU8, or RPU9 so that the total FPS across all three tiles does not exceed the recommended 120 FPS per RPU. You can still generate the IP with the FPS exceeding 120 FPS.
IIC
Select PS I3C I2C<0/1/2/3/4/5/6/7> to use the IIC peripheral in the Processing System Wizard, and select PL to instantiate the IIC IP in the PL fabric.
  • When PS I3C I2C<0/1/2/3/4/5/6/7> is selected, you must select the check box with the following message:
    This IIC is required to be manually enabled in the peripherals section of PS wizard.
  • When PL is selected, the following IIC Frequency (in kHz) and Address mode parameters must be provided to instantiate the IIC IP in the PL fabric
    IIC Frequency (in kHz)
    Select [1.0-1000.0] to determine the approximate frequency of the master mode generated SCL clock signal (Hz) on ISP<0/1> of Tile<0/1/2>.
    Address mode
    Select 7-bit or 10-bit addressing mode on ISP<0/1> of Tile<0/1/2>.
GPIO
Select PSX GPIO<0/1> to use the GPIO peripheral in the Processing System Wizard and PL to instantiate the GPIO IP in the PL fabric.
  • When PS GPIO<0/1> is selected, you must select the check box with the following message:
    This GPIO is required to be manually enabled in the peripherals section of PS wizard.
  • When PL is chosen, the following GPIO Width, All Inputs GPIO, and All Outputs GPIO parameters must be provided to instantiate the IIC IP in the PL fabric.
    GPIO width
    Select [1-32] based on your required GPIO width.
    All Inputs GPIO
    Select the check box to make all ports on the GPIO interface input ports as needed.
    All Outputs GPIO
    Select the check box to make all ports on the GPIO interface output ports as needed.