The following table shows the relationship between the fields in the AMD Vivado™ IDE and the user parameters (which can be viewed in the Tcl Console).
| Vivado IDE Parameter | User Parameter | Default Value |
|---|---|---|
| Number of MicroBlaze debug ports | C_MB_DBG_PORTS | 1 |
| Enable Debug Register Access from AXI | C_DBG_REG_ACCESS | 0 |
| Enable AXI Memory Access From Debug | C_DBG_MEM_ACCESS | 0 |
| Enable JTAG UART | C_USE_UART | 0 |
| Select Trace Interface | C_TRACE_OUTPUT | 0 = NONE |
| Specifies the JTAG user-defined register used | C_JTAG_CHAIN | 2 = USER2 |
| Select BSCAN location | C_USE_BSCAN | 0 = INTERNAL |