Go to Test-Logic Reset - 1.0 English - PG428

MicroBlaze Debug Module V (MDM V) LogiCORE IP Product Guide (PG428)

Document ID
PG428
Release Date
2024-11-13
Version
1.0 English
Ensure that the MDM RISC-V internal TAP Controller is in Test-Logic-Reset. This should be done after the initial read of BSCANID, or otherwise after every BSCAN reset activation. It is done by shifting in 0101010101010101 on bscan_ext_tdi to set the internal TMS to 1 for 8 internal TCK cycles.