- Support for JTAG-based software debug tools
- Support for debugging up to 32 MicroBlaze V processors
- Support for synchronized control of multiple MicroBlaze V processors
- Support for a JTAG-based UART using a configurable AXI4-Lite interface
- Based on Boundary Scan (BSCAN) logic in AMD devices
- Direct access to memory with a configurable AXI4 master interface and LMB interfaces
- Configurable software access to debug functionality through the AXI4-Lite interface
- Trace function to control RISC-V N-Trace in connected MicroBlaze V processors
- Connection to Debug Bridge through external BSCAN to support Xilinx Virtual Cable (XVC)