- Support for JTAG-based software debug tools
- Support for debugging up to 32 MicroBlaze V processors
- Support for synchronized control of multiple MicroBlaze V processors
- Support for a JTAG-based UART using a configurable AXI4-Lite interface
- Based on boundary scan (BSCAN) logic in AMD devices
- Direct access to memory with a configurable AXI4 master interface and LMB interfaces
- Configurable software access to debug functionality through the AXI4-Lite interface
- Support for cross-trigger between connected MicroBlaze V cores, integrated logic analyzer (ILA) cores, and processing systems in AMD Zynq™ 7000 SoC, AMD Zynq™ UltraScale+™ MPSoC, and AMD Versal™ devices
- Trace function to control RISC-V N-Trace in connected MicroBlaze V processors
- External trace function to funnel trace from connected MicroBlaze V cores to an external interface using RISC-V N-Trace Funnel and PIB Sink
- Connection to Debug Bridge through external BSCAN to support Xilinx Virtual Cable (XVC)