Debug Transport Module Interface Description - 1.0 English - PG428

The MDM V implements the serial JTAG Debug Transport Module (DTM) interface according to RISC-V External Debug Support, Version 1.0.

• The IR register is 5 bits.
• The IDCODE register is set by the parameter C_DTM_IDCODE with default value 0x00000093.
• The dtmcs register has idle set to 2, bits set to 11, and version set to 1. See RISC-V External Debug Support for details on this register.

In addition, the MDM V implements a parallel AXI4-Lite Debug Module Interface, where the Debug Module, Core, and Trigger register access is directly provided via the AXI4-Lite interface. Because the interface uses byte addresses and the Debug Module addresses are word-based, they are multiplied by four.