Overview - 1.0 English

Boundary Scan Switch LogiCORE IP Product Guide (PG426)

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1.0 English

The BSCAN Switch core is designed to provide a communication gateway to multiple BSCAN slave interfaces from a single master BSCAN interface. The core takes input via the slave BSCAN interface and multiplexes multiple BSCAN interface signals at the output. The BSCAN output interfaces can further be connected to multiple cores which have slave interfaces and drive them according to the core selected for that respective transaction. The IP can be used in the AMD Vivado™ IP integrator or can be instantiated in HDL in a Vivado project. The IP can also be used in applications that supports only a single BSCAN master but require multiple BSCAN slaves to be driven from it.

The following figure shows the block level design of the BSCAN Switch core when instantiated in the Vivado IP integrator.

Figure 1. Block Level Diagram: BSCAN Switch Core

The following figure shows the available ports in the master and slave BSCAN interface.

Figure 2. BSCAN Switch: Available Ports