Decoder Latency - 2.0 English

H.264/H.265 Video Decode Unit Solutions LogiCORE IP Product Guide (PG414)

Document ID
PG414
Release Date
2024-10-25
Version
2.0 English

The following figure shows the decoder latency.

Figure 1. Decoder Latency

The overall latency of the decoder is the steady state latency, equal to the sum of the hardware latency and the output latency. Hardware latency is the sum of the successive cancellation decoding (SCD) latency, the entropy decoding latency, and the pixel decoding latency. Initialization latency is the sum of the Coding picture Buffer (CPB) latency and the Decoder Initialization (Dec Init) latency.