References - 1.0 English - PG406

These documents provide supplemental material useful with this guide:

1. Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010)
2. Versal Adaptive SoC Technical Reference Manual (AM011)
3. Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)
4. Versal Adaptive SoC AIE-ML v2 Register Reference (AM029)
5. Versal AI Edge Series Gen 2 and Prime Series Gen 2 NoC and Integrated Memory Controller NPI Register Reference (AM033)
6. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
7. AMBA AXI4-Stream Protocol Specification (ARM IHI 0051A)
8. Versal Adaptive SoC PCB Design User Guide (UG863)
9. Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456)
10. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
11. Vivado Design Suite: AXI Reference Guide (UG1037)
12. Versal Adaptive SoC Schematic Review Checklist (XTP546)
13. Versal Adaptive SoC Design Process Documentation
14. Getting Started with Versal Memory Interfaces
15. Introduction to NoC DDRMC Design Flow
16. Obtaining and Verifying Versal Adaptive SoC Memory Pinouts
17. Versal Architecture and Product Data Sheet: Overview (DS950)