Logic in the PL region can optionally select the destination ID by way of a set
of pins on the NMU boundary and statically programmed NPI registers within the NMU. This
ID is then used to route the transaction through the NoC to the intended NSU. The destination interface pins are
shown in the following table.
| Interface Pin | Description |
|---|---|
| NMU_RD_DEST_MODE | Enable NMU_RD_USR_DST |
| NMU_RD_USR_DST[3:0] | 4-bit destination ID selection to use for read transactions |
| NMU_WR_DEST_MODE | Enable NMU_WR_USR_DST |
| NMU_WR_USR_DST[3:0] | 4-bit destination ID selection to use for write transactions |
When a destination interface is enabled by driving the RD_DEST_MODE or WR_DEST_MODE pin high, the value on the corresponding USR_DST pins will select from one of up to 16 destination IDs programmed in NOC2_NMU.REG_USER_DST0-15 to override any address decode.