BLI_NMU (PL) - 1.0 English - PG406

Programmable Network on Chip (NoC2) LogiCORE IP Product Guide (PG406)

Document ID
PG406
Release Date
2025-06-03
Version
1.0 English

The BLI_NMU is a full-featured NoC Master Unit, used to provide ingress to the horizontal NoC (HNoC) channels from AXI master units in the Programmable Logic (PL) array by way of a Boundary Logic Interface (BLI). They are functionally equivalent to the NMU512, but with a slightly reduced Fmax.