Synthesis and Implementation - Synthesis and Implementation - 1.1 English - PG401

RFSoC DFE Non-Linear Filter LogiCORE IP Product Guide (PG401)

Document_ID
PG401
Release_Date
2026-06-23
Version
1.1 English

This IP core works with the standard Synthesis and Embedded Design Implementation flow.

For details about synthesis and implementation, see the Vivado Design Suite User Guide: Designing with IP (UG896).