For comprehensive information about AMD Vivado™ simulation components, as well as information about using supported third-party tools, see the Vivado Design Suite User Guide: Logic Simulation (UG900).
The core offers a co-simulation environment that allows you to understand the programming and data flow of the core. You can select one or multiple test scenarios and run them using some simple and easy steps. A separate user guide is provided along with the co-simulation package.
The co-simulation environment uses MATLAB® to generate stimulus and programming sequences to drive the data and control interfaces of the RFSoC DFE Non-Linear Filter IP. The environment also collects data at the output. The analysis in MATLAB checks the data for bit-accuracy and the required behavior. Refer to the Co-Simulation User Guide for more details.