Control Interface
Use the control interface for writing to the configuration registers and loading the LUT RAMs. The control interface is implemented as an AXI4-Lite subordinate interface. The total memory space (including register and LUT space) is 4K words or 16 KB.
However, only the necessary memory locations are implemented in hardware. Even though the required address bus width is only 14-bit, the core has a 32-bit address bus at the interface. Internally, the higher 18 bits are unused. The AXI4-Lite register space is byte addressable. The following tables provides the corresponding word addresses.
Note: The corresponding AXI4-Lite byte address is four times the word address.
Tip: Use the Co-Simulation environment,
included in the core delivery archive, to understand the programming and data flow of the
core.
| Bits | Register |
|---|---|
| 31-14 | Reserved |
| 13-12 | Module select |
| 11-2 | Offset |
| 1-0 | 0 |