Reading LUT Data through the AXI4-Stream - Reading LUT Data through the AXI4-Stream - 1.1 English

Reading LUT Data through the AXI4-Stream - Reading LUT Data through the AXI4-Stream - 1.1 English - PG401

RFSoC DFE Non-Linear Filter LogiCORE IP Product Guide (PG401)

Document_ID

PG401

Release_Date

2026-06-23

Version

1.1 English

Follow these steps to read LUT data from the target location through the AXI4-Stream interface:

Add/assign target NL unit (unit_sel), target LUT (lut_sel), target location (addr) to s_axis_lut_config_tdata as mentioned in the s_axis_lut_config_tdata format.
Set the write (wr) bit Low to indicate that the transaction is a read transaction. You can assign zeros to write data (wdata) here.
Form s_axis_lut_config_tuser with target NLF block (nlf_sel) as mentioned in the s_axis_lut_config_tuser format.
Assert the s_axis_lut_config_tvalid signal.
Repeat steps 1 to 4 to read other target locations.

Note: The LUT data is available on m_axis_lut after some latency. The latency varies based on the core configuration but it is faster than AXI4-Lite interface. You can read LUT values continuously on every clock cycle.

m_axis_lut_tdata is a 32-bit complex LUT value. The 16 LSBs contain the signed real value and the 16 MSBs contain the signed imaginary value.

The following figure illustrates the timing for LUT access through AXI4-Stream.

Figure 1. LUT Data Access through AXI4-Stream Channel