NLF Dedicated Block Overview - NLF Dedicated Block Overview - 1.1 English - PG401

RFSoC DFE Non-Linear Filter LogiCORE IP Product Guide (PG401)

Document_ID
PG401
Release_Date
2026-06-23
Version
1.1 English

The NLF block is a dedicated high-speed processing unit designed for advanced I/Q transformations. Each block handles a 16-bit I/Q signal. The signal can operate over multiple phases. This supports super sampling rates up to 4x the clock rate. The block has the following features:

  • An initial alignment delay for phase synchronization
  • An ABS module (using a CORDIC algorithm) for optional magnitude calculation
  • A rounding and saturation stage to constrain data within the required range
Figure 1. NLF Dedicated Block

Within the NLF block, data passes through two programmable delay lines:

  • Signal tapped delay line which provides 16 configurable taps (one tap for each unit) for independent control of signal delay to each NL unit
  • Index tapped delay line contains 32 configurable taps. Each unit has two taps: one for LUT0 and one for LUT1. These taps allow independent control of indexing delays

These delay lines enable different term selections within the 16x16 signal/index grid. The block supports various operation modes to accommodate different input sampling rates. One NLF block can support up to 1 GSPS processing. To process rates greater than 1 GSPS, engage multiple blocks.