Generating the IP Reference Design - Generating the IP Reference Design - 1.1 English - PG401

RFSoC DFE Non-Linear Filter LogiCORE IP Product Guide (PG401)

Document_ID
PG401
Release_Date
2026-06-23
Version
1.1 English
The RFSoC DFE Non-Linear Filter core delivery archive includes the IP reference design. Execute these steps on a Linux machine to create a reference design with required number of phases for the DFE NLF IP.
  1. Unzip the reference design archive.
    DFE_NLF_IP_Reference_Design_v1_1_0.zip
  2. Change directory to refd.
    cd refd
  3. Generate the hardware bit-file and PetaLinux images.
    make all NUM_PHASES=<>