The core provides the s_axis_lut_config
interface when it is configured to access LUT RAMs on AXI4-Stream. The following table shows the tdata and tuser format of the AXI4-Stream.
The target location is one of the 256 (0 to 255) addresses of target LUT. There are two LUTs (LUT0, LUT1) for each NL unit. The IP has one or two NLF blocks based on the configuration and each NLF block has 16 (0 to 15) NL units. To define the absolute location of the target, you need the following information:
- NLF block identity (nlf_sel)
- NL unit identity (unit_sel)
- LUT identity (lut_sel)
- Address of the target location (addr)
The format of the LUT access stream interface is such that it defines the target location and has provisions for data and write/read instruction.
| Unused | wdata | unit_sel | lut_sel | addr | wr |
|---|---|---|---|---|---|
| 55-48 | 47-16 | 15-10 | 9 | 8-1 | 0 |
| Reserved | nlf_sel |
|---|---|
| 7-1 | 0 |
- wr (1-bit)
- Instruction to the core to indicate transaction mode.
- 0 - Read transaction
- 1 - Write transaction
- addr (8-bit)
- Use this 8-bit address to select one of the 256 (0 to 255) locations of LUT RAM.
- lut_sel (1-bit)
- Each NLF dedicated block has two LUTs (LUT0/LUT1). This bit indicates the
target LUT.
- 0 - Targets LUT0
- 1 - Targets LUT1
- unit_sel (6-bit)
- Use this 6-bit address to select the target NL unit from the 16 NL units that are available.
- wdata (32-bit)
- 32-bit complex data with real data on 16 LSBs and imaginary data on 16 MSBs.
- nlf_sel (1-bit)
- Use this bit to select the required NLF block.