DPU Debug Registers - 1.0 English

DPUCADF8H for Convolutional Neural Networks Product Guide (PG400)
Document ID
PG400
Release Date
2024-03-15
Version
1.0 English

The DPU debug registers are used to indicate the processing statuses. The details of debug registers are in the following table.

Table 1. DPU Debug Registers
Register Address Offset Bits Type Description
VERSION 0x07C [31:0] R The DPU version.
DPU_PROF_ENABLE 0x084 [0:0] W Profiler enable.
DPU_PROF_ADDR 0x088 [63:0] W The address of profiler data.
DPU_PROF_FLAG 0x090 [7:0] R Flag information of the last record.
  • [7]-MISC Finish
  • [6]-CONV Finish
  • [5]-SAVE Finish
  • [4]-LOAD Finish
  • [3]-MISC Start
  • [2]-CONV Start
  • [1]-SAVE Start
  • [0]-LOAD Start
PU_PROF_TSTAMP 0x094 [31:0] R The cycle counter of DPU processing time. Saturation counting.
DPU_PROF_LSNUM 0x098 [31:0] R The event number of LOAD start.
DPU_PROF_SSNUM 0x09C [31:0] R The event number of SAVE start.
DPU_PROF_CSNUM 0x0A0 [31:0] R The event number of CONV start.
DPU_PROF_MSNUM 0x0A4 [31:0] R The event number of MISC start.
DPU_PROF_LFNUM 0x0A8 [31:0] R The event number of LOAD finish.
DPU_PROF_SFNUM 0x0AC [31:0] R The event number of SAVE finish.
DPU_PROF_CFNUM 0x0B0 [31:0] R The event number of CONV finish.
DPU_PROF_MFNUM 0x0B4 [31:0] R The event number of MISC finish.
DPU_STATUS 0x0B8 [31:0] R The DPU status signals for debugging.
DRU_STATUS 0x0BC [31:0] R The DRU status signals for debugging.
DONE_CNT 0x0C0 [7:0] R Done signal counter.