Core Overview - 1.0 English

DPUCADF8H for Convolutional Neural Networks Product Guide (PG400)

Document ID
PG400
Release Date
2024-03-15
Version
1.0 English

The AMD DPUCADF8H is a DPU IP optimized for the AMD Alveo™ U200 and U250 cards and targeted for high throughput applications. The unit includes a data rearrangement module, a data mover, a high-performance scheduler module, a global memory module, and four processing elements (PE). Each PE contains a convolution engine module, a local memory module, and a misc engine module. The key features are listed as follows:

  • Throughput oriented and high-efficiency computing engines
  • Wide range of convolution neural network support
  • Optimized for high-resolution images.

The top-level block diagram of DPUCADF8H is shown in following figure:

Figure 1. DPUCADF8H Top-Level Block Diagram