| Bits | Description |
|---|---|
| 0 | Reset signal |
| 2:1 | Specifies the rate information |
| 3 | To reset the PLL |
| 6:4 | Specifies the number of lanes used |
| 12:8 | Specifies the vertical swing information (applicable for TX only) |
| 17:13 | Specifies the pre-cursor value (applicable for TX only) |
| 22:18 | specifies the post-cursor value (applicable for TX only) |
| 30 | Issue the data path reset |
| 31 | Power on reset |