Obtaining the .elf File - 1.1 English - PG396

Perform the following steps to get the .elf file from the AMD Vitis™ software platform.

1. Open the Vitis software platform.
   
   
2. Go to File > New Application Project.
   
   
3. Add the .xsa file, created using the Vivado tools.
   
   
4. Select XSA from the Create a New platform from the hardware window in New Application project.
   
5. In the New Application Project window, select the appropriate CPU, OS, and Language to generate the application (in C language).
   
   
6. Select Empty Application from the New Application Project window.
   
   
   
7. After all the options are selected, the following window appears.
   
   
8. To create/run the design-related application .elf file, open the Explorer window in the Vitis software platform and select project name and the appropriate application, as shown in the following figure.
   
   
9. Select the target application and click OK. The following window appears.
   
   
   Note: Math library is required to compile the driver successfully. Select C/C++ Build settings > Tool Settings > ARM v8 gcc linker > Libraries and add m.
10. Upon selecting the application source files, the Vitis software platform compiles the application and generates an .elf file in the Debug folder in the Explorer window.
    
    
11. Download the bitstream into the FPGA by selecting Xilinx Tools and then Program FPGA. The Program FPGA dialog box opens.
12. Ensure that the Bitstream field shows the bitstream file generated by the Tcl script, and click Program.
    Note: The DONE LED on the board turns green if the programming is successful.
13. A terminal program (HyperTerminal or PuTTY) is required for UART communication. Open the program, choose the appropriate port, set the baud rate to 115200, and establish a serial port connection.
14. Select and right-click the application v_warp_example_design in the Explorer panel.
15. Select Run As > Launch on Hardware (GDB).
16. Select Binaries and Qualifier, and click OK.